[BARCO SILEX 1] Implementation of security protocols on SoC FPGA platform in the ARM Trustzone
The thesis will be done at Barco-Silex site in Louvain-La-Neuve. Barco-Silex is a specialist in SoC development (ASIC/FPGA), cryptographic engines and video processing. Security platform including HW (in VHDL) and SW has been developed able to be used in different applications (Securing the device, communication, contents...).
The objective is to implement security protocol based on standard like EPID or others using existing platform from Barco-Silex (SoC FPGA-based emulation platform). Benchmarks will be done comparing pure SW implementation with implementation using HW offloading.
The student will have to understand embedded security concept and define an implementation strategy with the internal team. He will potentially put in place Trustzone on Cortex A9 and implement security protocol in it. The SW will be done in C but models or reference can be generated using scripting languages like Tcl or Python.
EPID is a digital signature scheme with special properties
– One group public key corresponds to multiple private keys – Each unique private key can be used to generate a signature – Signature can be verified using the group public key
Internship: this master thesis is compatible with a preliminary 10 ECTS internship at Barco Silex.
Industrial Responsible: Sébastien Rabou
Product Manager SoC ASIC/FPGA & Crypto/Security Tel : +32 10 486 490
Rue du bosquet, 7
1348 Louvain La Neuve