Implementation of high-level cryptography protocol using a SoC platform (with Barco Silex)
Promotor: Prof. Frederic ROBERT (Frederic [dot] Robert [at] ulb [dot] ac [dot] be)
Barco Silex contactperson: M. Thierry Watteyne, CEO (Thierry [dot] Watteyne [at] barco [dot] com)
This subjet is well adapted to be coupled to a 60 working day/10 credits intership (STAG-H501). Internship applications may be directly sent to M. Watteyne: motivation letter + curriculum vitae.
The master thesis will be done at Barco-Silex site in Louvain-La-Neuve. Barco-Silex is a specialist in SoC development (ASIC/FPGA), in cryptographic engines and video processing. A platform which is SoC based (System-On-Chip) has been developed with their crypto IP’s (AES, Public Key, Hash functions…) in hardware (VHDL). The SoC platform is ARM-based.
The objective is to map crypto libraries to Barco-Silex’s custom SW API and HW IP using SoC platform running Linux OS. Part of some security applications will be implemented using the crypto libraries framework. During development, HW IP might have to be adapted to ease SW development and/or increase overall system performances. The goal is to have the best hardware/software trade-off.
The student will have to understand cryptographic algorithm principles, ARM-based SoC, FPGA implementation, OS (Linux) and embedded SW. On the HW side, he will adapt potentially the VHDL and use simulation tools suite (Mentor, Cadence…). He will also use implementation tool suite from Xilinx or Altera (i.e. Vivado and/or Quartus). On the SW side, he will potentially adapt or design Linux kernel modules but also develop crypto libraries and applications on top using C-language.