[LHC/CMS2] - Exploring FPGA hardening solutions at the detector level for the future high luminosity phase of the CMS
Everyone knows the LHC (Large Hadron Collider), the huge particle accelerator that confirmed the existence of the Higgs boson recently.
The « high luminosity » phase of the LHC has the purpose of multiplying by 10 the LHC luminosity (performance) in 2020. The ULB is involved in this project via the IIHE group (High Energy Institute), Prof. Gilles de Lentdecker. The present subject is proposed in collaboration between the IIHE and the BEAMS Embedded Electronics research group since it focuses on FPGA development.
The goal of the project is to contribute to the development of the data acquisition system (DAQ) that collects the information coming out of the particle detectors, close to the particle collision site. The information coming out of the detectors is collected by a so-called VFAT electronics board and then concentrated, for each group of 24 boards, on a « opto-hybrid » board before being propagated further in the DAQ system. The opto-hybrid board uses an FPGA to collect and process the data.
Since the opto-hybrid boards and its FPGA are close to the collision site, they are submitted to particle irradiation that may damage electronics, specifically at the higher levels envisioned in future operation phases. Test and characterization of this electronics regarding irradiation is then mandatory. Based on a first exploratory master thesis on irradiation characterization two year ago, this master thesis will consist in defining and running a protocol to experimentally characterize the opto-hybrid board in future irradiation conditions, in order to conclude about potential failure of the opto-hybrid board and potential counter-measures to be applied. Tests will be conducted at the Louvain-la-Neuve cyclotron, and possibly at CERN.